术语表
\begin{multicols}{2}
\textbf{AOS} Array Of Structures
\textbf{BB} Basic Block
\textbf{BIOS} Basic Input Output System
\textbf{CI/CD} Contiguous Integration/ Contiguous Development
\textbf{CPI} Clocks Per Instruction
\textbf{CPU} Central Processing Unit
\textbf{DSB} Decoded Stream Buffer
\textbf{DRAM} Dynamic Random-Access Memory
\textbf{DTLB} Data Translation Lookaside Buffer
\textbf{EBS} Event-Based Sampling
\textbf{FLOPS} FLoating-point Operations Per Second
\textbf{FPGA} Field-Programmable Gate Array
\textbf{GPU} Graphics processing unit
\textbf{HFT} High-Frequency Trading
\textbf{HPC} High Performance Computing
\textbf{HW} Hardware
\textbf{I/O} Input/Output
\textbf{IDE} Integrated Development Environment
\textbf{ILP} Instruction-Level Parallelism
\textbf{IPC} Instructions Per Clock cycle
\textbf{IPO} Inter-Procedural Optimizations
\textbf{ITLB} Instruction Translation Lookaside Buffer
\textbf{LBR} Last Branch Record
\textbf{LLC} Last Level Cache
\textbf{LSD} Loop Stream Detector
\textbf{MSR} Model Specific Register
\textbf{MS-ROM} Microcode Sequencer Read-Only Memory
\textbf{NUMA} Non-Uniform Memory Access
\textbf{OS} Operating System
\textbf{PEBS} Processor Event-Based Sampling
\textbf{PGO} Profile Guided Optimizations
\textbf{PMC} Performance Monitoring Counter
\textbf{PMI} Performance Monitoring Interrupt
\textbf{PMU} Performance Monitoring Unit
\textbf{PT} Processor Traces
\textbf{RAT} Register Alias Table
\textbf{ROB} ReOrder Buffer
\textbf{SIMD} Single Instruction Multiple Data
\textbf{SMT} Simultaneous MultiThreading
\textbf{SOA} Structure Of Arrays
\textbf{SW} Software
\textbf{TLB} Translation Lookaside Buffer
\textbf{TMA} Top-down Microarchitecture Analysis
\textbf{TSC} Time Stamp Counter
\textbf{ op} MicroOperation
\end{multicols}